AMD develops custom EPYC processors with integrated HBM3 memory specifically for Microsoft Azure

Microsoft has announced its latest HBv series virtual machines for Azure, which offer exceptional performance due to their tailor-made AMD EPYC processors. These customized EPYC processors incorporate a unique design featuring HBM3 memory, boasting up to 352 Zen 4 CPU cores and achieving 6.9 TB/s of memory bandwidth.

The new HBv5 virtual machines from Microsoft can be equipped with between 400 and 450GB of HBM3 memory. Each VM consists of four processors, with each processor housing 88 Zen 4 CPU cores, providing up to 9GB of HBM3 memory for each CPU core, an impressive amount of memory. Moreover, this memory allows for quicker access than standard DRAM since it is directly connected to the CPU via an interposer.

A primary advantage of Microsoft's new HBv5 VMs is their memory bandwidth. Memory performance often presents a significant constraint for enterprise CPU users. Consequently, AMD and Microsoft collaborated to design these processors specifically to mitigate these potential bottlenecks. Microsoft asserts that their new Azure HBv5 systems are capable of achieving up to 8 times the memory bandwidth compared to their competitors and are up to 35 times quicker than HPC servers that are 4-5 years old and nearing the end of their hardware lifecycle.

These new VMs from Microsoft provide remarkable memory bandwidth capabilities. In essence, the bandwidth offered by these VMs renders all previous HBv virtual machines from Microsoft comparatively sluggish. According to reports, the server CPUs in Microsoft’s HBv5 series feature double the Infinity Cache bandwidth of standard AMD EPYC processors, along with 800Gb/s Nvidia Quantum-2 InfiniBand connectivity for network switching. Additionally, these CPUs are designed without SMT and intended for single-tenant scenarios to enhance security.

In a way, AMD's implementation of HBM3 memory addresses a challenge similar to what their 3D V-Cache technology achieves. Both methods position high-speed memory closer to the CPU than traditional DRAM does. While V-Cache incorporates memory directly onto the CPU in the form of additional L3 cache, HBM4 serves as a sort of L4 cache with memory linked to the CPU through an interposer. HBM3 memory delivers greater bandwidth than conventional DRAM and has significantly lower latency, allowing CPU cores to receive data more swiftly and enhancing a variety of workloads.

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